Dr. Ritesh Kumar Jaiswal
Qualification : Ph.D.
Details of Educational Qualification:
Course | Specialization | Group | College Name/University | Year of Passing |
---|---|---|---|---|
Ph.D. | VLSI Design | Electronics and Communication Engineering | Motilal Nehru National Institute of Technology, Allahabad | 2019 |
M.Tech. | Digital Systems | Electronics and Communication Engineering | Madan Mohan Malaviya University of Technology, Gorakhpur | 2010 |
B.Tech. | Electronics & Telecommunication Engineering | Electronics & Telecommunication Engineering | Raj Kumar Goel Institute of Technology, Uttar Pradesh Technical University | 2007 |
Note : Students are advised to meet me in Room No : WB-012 at any time other than my class hours mentioned in the below timetable for any discussions related to the subjects & research.
My Schedule for 2021-22
My Publications
S.No | Title of the Paper | Full Details of Journal Name / Conference Name, Volume number, page number, Date |
---|---|---|
1 | "Perspective and Opportunities of Modulo 2 n− 1 Multipliers in Residue Number System: A Review." | Journal of Circuits, Systems and Computers (2020): 2030008. |
2 | "Area Efficient Memoryless Reverse Converter for New Four Moduli Set {2^(n−1), 2^n− 1, 2^n+ 1, 2^(2 n+ 1)− 1}." | Journal of Circuits, Systems and Computers 27, no. 05 (2018): 1850075. |
3 | "Area Efficient Sparse Modulo 2 n-3 Adder." | Circuits and Systems 7, no. 12 (2016): 4024. |
4 | “Design and Analysis of RNS-based Sign Detector for the Moduli Set {2^n, 2^n - 1, 2^n + 1},” | (CSSP-Communicated). |
5 | "Design and Analysis of Selfbiased OTA for Low-Power Applications." | In Advances in VLSI, Communication, and Signal Processing, MNNIT Allahabad, pp. 627-637. Springer, Singapore, 2020. |
6 | "Efficient Design for High Speed and Low Area Reverse Converter for Moduli Set $\{2^{n}, 2^{2n}-1, 2^{2n}\{1\} $." | 2019 International Conference on Electrical, Electronics and Computer Engineering (UPCON), AMU Aligarh, pp. 1-6. IEEE, 2019. |
7 | "Outage Probability of Device-to-Device Communication Underlaying Cellular Network over Nakagami/Rayleigh Fading Channels." | 2019 9th International Conference on Emerging Trends in Engineering and Technology-Signal and Information Processing (ICETET-SIP-19), GHRCE Nagpur, pp. 1-5. IEEE, 2019. |
8 | "Linearity Enhancement of CMOS OTA for High Performance Applications." | 2018 5th IEEE Uttar Pradesh Section International Conference on Electrical, Electronics and Computer Engineering (UPCON), MMMUT Gorakhpur, pp. 1-6. IEEE, 2018. |
9 | "Performance evaluation of digital and RNS based filter for fast DSP processors." | 2017 International Conference on Emerging Trends in Computing and Communication Technologies (ICETCCT), GEHU Dehradun, pp. 1-4. IEEE, 2017. |
10 | " New Area Efficient Modulo 2^n+1 Multiplier," | Proceedings of the IC4T 2K 2016 Nov 10-12, SRM University Lucknow, 2016. |
11 | "Performance analysis of SiGerC HBT." | 2010 International Conference on Computer and Communication Technology (ICCCT), MNNIT Allahabad, pp. 314-317. IEEE, 2010. |