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Dr. Rekib Uddin Ahmed

Qualification : Ph.D.

Details of Educational Qualification:

Course Specialization Group College Name/University Year of Passing
Ph.D. Electronics and Communication Engineering Electronics and Communication Engineering National Institute of Technology, Meghalaya 2021
M.Tech. Electronics Design & Technology Electronics and Communication Engineering Tezpur Central University, Assam 2015
B.Tech. Electronics and Communication Engineering Electronics and Communication Engineering North Eastern Hill University, Shillong 2013

Note : Students are advised to meet me in Room No : EB-215 D (Staff room) at any time other than my class hours mentioned in the below timetable for any discussions related to the subjects & research.

My Schedule for 2021-22

                                     

List of Publications

S.No Title of the Paper Full Details of Journal Name / Conference Name, Volume number, page number, Date
1 “On The Implementation of Densely Packed Decimal Number System based Adder: Prospects and Challenges” Electronics, vol. 25, no. 1, Jun. 2021 (Scopus Indexed)
2 “Sensitivity Analysis of the UTBSOI Transistor based Two-Stage Operational Transconductance Amplifier”, Electronics, vol. 24, no. 2, pp. 75-80, Dec. 2020. (Scopus Indexed)
3 “Revisiting Analytical Models of N-Type Symmetric Double-Gate MOSFETs” Electronics, vol. 24, no. 1, pp. 15-32,Jun. 2020. (Scopus Indexed)
4 “Design of Double-Gate CMOS based Two-Stage Operational Transconductance Amplifier using the UTBSOI Transistors” UPB Scientific Bulletin, Series C: Electrical Engineering and Computer Science, vol. 82, no. 2, pp. 173-188, Jun. 2020. (Scopus and ESCI Indexed)
5 “Modeling of Short P-Channel Symmetric Double- Gate MOSFET for Low Power Circuit Simulation” Periodica Polytechnica Electrical Engineering and Computer Science, vol. 64, no. 1, pp. 106−114, Dec. 2019. (Scopus Indexed)
6 “Single-Stage Operational Transconductance Amplifier Design in UTBSOI Technology Based on gm/Id Methodology” Electronics, vol. 23, no. 2, pp. 52−59, Dec. 2019. (Scopus Indexed)
7 “Implementation Topology of Full Adder Cells” 2nd International Conference on Recent Trends in Advanced Computing (ICRTAC), Chennai, India (Proceedings in Procedia Computer Science, vol. 165, pp. 676- 683, 2019).
8 “Design of New Multi-Column 5,5:4 Compressor Circuit Based on Double-Gate UTBSOI Transistors” 2nd International Conference on Recent Trends in Advanced Computing (ICRTAC), Chennai, India (Proceedings in Procedia Computer Science, vol. 165, pp. 532-540, 2019).
9 “Fast and Area Efficient Implementation of RSA Algorithm” 2nd International Conference on Recent Trends in Advanced Computing (ICRTAC), Chennai, India (Proceedings in Procedia Computer Science, vol. 165, pp. 525-531, 2019) Best paper award.
10 “Design and Analysis of New 5,5:4 Compressor” 6th International Conference on Computing, Communication and Sensor Networks (CCSN), Kolkata, India, Dec. 2017, pp. 34-36.
11 “Modeling of Threshold Voltage and Subthreshold Current for P-Channel Symmetric Double-Gate MOSFET in Nanoscale Regime” 3rd IEEE International Symposium on Nanoelectronic and Information Systems (iNIS), Bhopal, India, Dec. 2017, pp. 179-183.
12 “Modeling of Potential and Threshold Voltage in presence of Hot-Carriers for short-channel Double-Gate MOSFET” International Conference on Electronic Devices, Circuits, Applied Electronics and Communication Technology (EDCAECT), Guwahati, India (Proceedings in Advanced Research in Electrical and Electronic Engineering, vol. 2, no. 11, pp. 15-20, Sep. 2015).
  • P. Saha, R.U. Ahmed, and S.D. Thabah, “Design and Implementation of Multioperand 2n−1, 2n, and 2n+1 Modulo Set Adder," in Advances in Communication, Devices and Networking. Lecture Notes in Electrical Engineering, vol 776, S. Dhar, S.C. Mukhopadhyay, S.N. Sur, CM. Liu, Eds, Springer: Singapore, 2021, pp. 1-8.
  • R.U. Ahmed and P. Saha, “Implementation aspects of multi-bit adders using UTBSOI transistors," in Smart Trends in Computing and Communications: Proceedings of SmartCom 2020. Smart Innovation, Systems and Technologies, vol. 182, Y.D Zhang, T. Senjyu, C. SO–IN, A. Joshi, Eds, Singapore: Springer, 2020, pp. 355- 363.
  • R.U. Ahmed and P. Saha, "Power and Delay Comparison of 7:3 Compressor Designs Based on Different Architectures of XOR Gate," in Inventive Communication and Computational Technologies. Lecture Notes in Networks and Systems, vol. 89, G. Ranganathan, J. Chen , and A. Rocha, Eds, Singapore: Springer, 2020, pp. 461-469.